A Lissajou Master Class

The Analyst’s Handbook: Principles of AC Transient Analysis  & Interpreting Complex Capacitance in Power Semiconductors 

Silicon Fingerprinting: Extracting Technology Signatures from Drain-Down Architectures

The 3D Interconnect Diagnostic: Navigating Parasitic Loading in Multi-Chip Modules (MCMs)

Waveform Deconstruction: A New Era of Predictive Reliability in Power Electronics

Sub-Surface Insights: Mapping Gate Charge Dynamics using Lissajous Vectoring

Technical Uniqueness & Disruption

This White Paper introduces the concept of "drain-down" architecture where the source metal wraps the gate to create an electrostatic shield (field-plate). This creates highly specific current pulses in the Lissajous figures that allow an analyst to distinguish between different generations of NexFET technology and field plate capacitance modulation. It also tackles 3D integration (MCMs), where it analyzes how stacked MOSFETs influence capacitive loading—a topic much more complex than the discrete components covered in a reference paper.

Fundamental Principles:

• Core Theory: use a curve tracer in AC mode at 50Hz to create V-I curves (Lissajous figures) representing gate capacitance.

• Threshold Identification: describe the "current peak" seen in the waveform as the point where the channel turns on threshold voltage (Vth).

• Basic Failures: the non destructive visual signatures for hard shorts and threshold shifts correlate to 2nd level physical failure analysis observations.

The reason dramatic "spikes" on a Tektronix 370 are observed but not on a Keysight 4156C or an LCR meter comes down to the fundamental difference between Time-Domain Transient Response and Frequency-Domain Steady-State Measurement.

To understand why the Tek 370 is unique in this regard, we have to look at the physics of how each instrument interacts with the MOSFET's gate.

1. The Tek 370: Large-Signal AC Transient Analysis

The Tek 370 in AC mode is essentially a high-voltage, high-current Time-Domain instrument.

• The Stimulus: It applies a 50Hz/60Hz high-voltage sine wave (Vgs = A sin(\omega t)). This is a "Large-Signal" stimulus, meaning the voltage swings across the entire operating range of the device (e.g., -10V to +10V) 50 times per second.

• The Physics (I = C dv/dt): The current displayed on the Y-axis is the instantaneous displacement current. When the MOSFET hits its threshold voltage (Vth), the internal capacitance (Ciss) doesn't just change; it shunts or "steps" due to the formation of the inversion layer and the depletion region dynamics (especially in the 3D "drain-down" architecture described in the TI paper).

• The "Spike": Because the dv/dt is continuous but the C is a non-linear function of V, the sudden "in-rush" of charge required to fill that new capacitance creates a localized current surge (Iinst = C(v) \cdot \dvdt). The Tek 370’s analog amplifiers are fast enough to capture this transient surge as a vertical spike or "ear" on the Lissajous loop.

2. The Keysight 4156C: DC Parameter Analysis (SMU)

The 4156C is a Precision Semiconductor Parameter Analyzer. It is designed for DC Quiescent measurements.

• The Stimulus: It steps the voltage and waits for the device to reach a "Steady State" before taking a measurement.

• Integration Time: SMUs (Source Measure Units) use integration windows (NPLC) to filter out noise. Any "in-rush" current that occurs when the voltage steps is intentionally ignored or filtered out so the machine can measure the stable, "leakage" current.

• The Result: You see a clean Igss (picoamps of leakage), but the dynamic capacitive "spike" is long gone by the time the SMU finishes its integration cycle. Too slow.

3. The LCR Meter: Small-Signal AC Steady-State

An LCR meter (or the C-V plot function on a B1500) measures capacitance differently than a curve tracer.

• The Stimulus: It applies a DC bias and overlays a very tiny Small-Signal AC oscillation (typically 10mV to 100mV) at a high frequency (1kHz to 1MHz).

• Frequency Domain: It uses a phase-sensitive detector (Lock-in amplifier) to measure the impedance (Z) at that specific frequency. It calculates C from the imaginary part of the impedance.

• The Result: It gives you a plot of C vs V. You see the "hump" where capacitance increases, but you don't see the current spike because the instrument is designed to subtract the charging current to give you the mathematical value of the capacitor itself.

In short, the Tek 370 shows you the "violence" of the charge moving into the 3D gate structure at 50Hz. The 4156C and LCR meters are too "polite"—they wait for the dust to settle before they take a reading, which is why they miss the very features (the spikes) that make the related TI and Infineon publications so useful for failure analysis. 

Microelectronics Failure Analysis:

• The "Wilson" Influence: This paper reference the foundational work of D. Wilson (Curve Tracer Data Interpretation), which is the industry standard for using these techniques on bipolar devices.

• JEDEC/Industry Standards: The methods described for measuring I_{GSS} and V_{GS(th)} are aligned with standard semiconductor data book specifications, though both papers emphasize that Lissajous analysis provides a more dynamic view than static DC tests.

• Common Industry Practice: Using Lissajous figures for "golden unit" comparison is a ubiquitous practice in FA labs worldwide; this paper documents the detailed and specific application to power MOSFETs.